The present invention relates to focused ion beam (FIB) methods used, for example, in failure analysis of Very Large Scale Integrated (VLSI) circuit devices. In particular, the present invention relates to methods and systems in which a FIB is used to mill copper conductors within integrated circuits.
A focused ion beam (FIB) system focuses ions into a beam and scans the beam across small areas of a sample. The beam interacts with the sample to produce secondary electrons that are then collected to produce an image of the sample. Raised areas on the sample produce more secondary ions than depressed areas, and this difference provides sufficient contrast to produce high-resolution images similar to that of a scanning electron microscope (SEM).
The ion beam typically employed by FIB systems uses Gallium ions. Gallium ions have sufficient energy (mass and speed) to mill sample surfaces. Thus, in addition to imaging, FIB systems can drill holes, cut metal lines, and connect metal lines (through metal deposition) in integrated circuits. These functions are often used in failure analysis. For example, drilling holes in an insulation layer can expose underlying features for test, and cutting and connecting metal lines can help to locate or confirm a failure. Such techniques can be performed in FIB systems that facilitate the identification of opens and shorts using voltage-contrast images. For a more detailed treatment of conventional FIB systems and voltage-contrast imaging, see U.S. Pat. No. 5,140,164, entitled xe2x80x9cIC Modification With Focused Ion Beam System,xe2x80x9d by Talbot et al., and U.S. Pat. No. 5,521,516, entitled xe2x80x9cSemiconductor Integrated Circuit Fault Analyzing Apparatus and Method Therefor,xe2x80x9d by Hanagama et al. Both of these patents are incorporated herein by reference.
Conventional FIB systems work well for milling aluminum conductors on integrated circuits. However, many in the semiconductor industry are pursuing new process technologies that employ copper metallization to produce superior circuits. Technologies that employ copper metallization would benefit from FIB imaging and milling in the same manner as technologies that employ aluminum metallization. Unfortunately, milling copper using conventional FIB systems has proved difficult.
Aluminum lines are typically formed on top of an insulating layer so that the top surface of the aluminum is above the top surface of the insulating layer. A passivation layer applied over the top of the aluminum and insulating layers to protect the aluminum follows the contours of the aluminum, resulting in raised areas over aluminum structures and valleys between them. This surface relief is easily identified using ion beam imaging and can therefore be used to locate lines of interest. In contrast, conventional copper metallization is formed within concavities (e.g., trenches) in an insulating layer. A subsequent planarization process, such as chemical-mechanical polishing, produces a flat surface in which the top surfaces of the copper and insulating layers are even. A passivation layer is then applied over the copper and insulating layers to protect the copper. The resulting structure is substantially flat, rendering it difficult or impossible to identify copper lines using ion-beam imaging.
The natural solution to the viewing problem is to remove the passivation layer over the copper lines. However, copper reacts strongly in the presence of gases used to enhance FIB etching during the milling process. Thus, the chemistry used to mill a very small feature attacks copper surfaces in the area surrounding the feature. For example, iodine used in gas-assisted etches attacks and destroys copper metallization in the immediate area of the milled feature. Further, severed copper lines can grow back together after FIB exposure. These and other problems associated with FIB milling of copper are noted in an article entitled xe2x80x9cThe Challenges of FIB Chip Repair and Debug Assistance in the 0.25 xcexcm Copper Interconnect Millennium,xe2x80x9d by S. B. Herschbein, et al. (1998), which is incorporated herein by reference. Copper lines severed using FIB also suffer from electrical xe2x80x9cbridgingxe2x80x9d between segments and with adjacent circuit features. This undesirable bridging is possibly the result of copper atoms displaced by the ion beam remaining in and around the mill site.
FIB techniques must be adapted for use with copper metallization if FIB methodology is to retain its usefulness as copper replaces aluminum as the interconnect metallurgy of choice for high-performance integrated circuits.
The present invention is directed to methods of adapting FIB techniques to copper metallization, and to structures that result from the application of such techniques. A method in accordance with the invention can be used to sever copper traces without damaging adjacent material or creating conductive bridges to adjacent traces.
Semiconductor devices that employ copper traces typically include a protective passivation layer that protects the copper. This passivation layer is removed to render the copper traces visible to an FIB operator. The copper surface is then oxidized, as by heating the device in air, to form a copper-oxide layer on the exposed copper. With the copper-oxide layer in place, an FIB is used to mill through the copper-oxide and copper layers of a selected copper trace to sever the trace. The copper-oxide layer protects copper surfaces away from the mill site from reactive chemicals used to enhance etching during the milling process. In one embodiment, a copper-oxide layer at least 40 nanometers thick affords adequate protection.
In one embodiment, copper traces reside in concavities in an underlying insulating layer. These conventional structures are formed using a planar process, such as chemical-mechanical polishing, before applying the passivation layer. When subjected to FIB techniques in accordance with the invention, copper traces disposed within the concavities are encapsulated by the insulating and copper-oxide layers prior to milling. The milling process then produces a trench that extends through the copper-oxide layer, the copper, and into the underlying insulating layer.
This summary does not purport to define the invention; the appended claims define the invention.